Wireline serial transceivers (SerDes) are ubiquitous in a variety of communication infrastructures, data centers, and terminal chipsets. SerDes are responsible for connecting the digital core of an integrated circuit (chip) with the outside world. The communication speed of SerDes is much faster than the frequency of the digital core of the chip. As a result, SerDes perform functions that include channel equalization, clock and data recovery, retiming, and serialization-deserialization of input symbols and data in order to interface with the chip's digital core. Modern communication chips may include 100 to 200 SerDes or more. This high density of SerDes increases the importance of SerDes with built-in and on-die self-test and diagnostic features.
This background information is intended to provide information that may be of possible relevance to the present invention. No admission is necessarily intended, nor should be construed, that any of the preceding information constitutes prior art against the present invention.